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The policy is a non-binding national strategic framework — it issues no direct spending mandate of its own, but operationalises an existing spending envelope. Poland adopted the "National Framework for Supporting Strategic Semiconductor Investments" in December 2023 with a >PLN 7 bn budget through 2026; the 2025+ policy translates that umbrella into seven operational pillars:
1. Infrastructure — three specialised semiconductor parks (Mazovia: chip design hub; Lower Silesia: materials manufacturing; Pomerania: sensor/MEMS technologies). 2. State impetus — government co-investment vehicles, grant instruments aligned with the EU Chips Act Important Projects of Common European Interest (IPCEI-ME/CT) framework. 3. Regional and international cooperation — bilateral MoUs with EU member states, TSMC ecosystem engagement, EU Chips Act joint-undertaking participation. 4. Investments and financing — investor roadmap targeting back-end (ATP: assembly, test, packaging) rather than advanced front-end fabs; headline: 2–3 investments by 2030, €300–600 M added value each. 5. Personnel and education — engineering-faculty expansion, semiconductor apprenticeship programmes, diaspora-return schemes. 6. Access to energy and water — securing industrial-scale utility access at designated park sites (energy-intensive fab requirements: ~100 MW+, ultra-pure water). 7. Access to chemicals and raw materials — supply-chain mapping of process chemicals (HF, CMP slurry, photoresists) and wide-bandgap substrates (SiC, GaN) for domestic production.
sector policy; peer strategies from Czechia (2024-10-10-czechia-national-semiconductor-strategy) and the broader Western cluster give the register a comparative benchmark.
labour-cost advantages persist (unlike advanced logic fabs which are capital-density plays). This positions Poland differently from Western European front-end ambitions (TSMC Dresden, Intel Magdeburg).
is the simultaneous supply-chain track — UC83 handles upstream minerals while this policy handles downstream semiconductor manufacturing.
the primary R&D anchor for the SiC/GaN wide-bandgap pilot line — a government research institute rather than a commercial fab, consistent with severity-2 (strategic framework, not binding capex commitment).
not yet confirmed as of H1 2025; investment-readiness certification timelines unclear.
Next data point: Ministry of Development state-aid notification to DG COMP.
eligibility window and Commission notification timeline TBD.