Philippines PSEI Roadmap 2026–2030: $110B semiconductor and electronics export target

Mechanism

The PSEI Roadmap operationalises the governance framework established by Administrative Order No. 31 s. 2025 (filed at 2025-03-28-philippines-ao-31-seiac-semiconductor-advisory-council), converting the SEIAC advisory architecture into a concrete five-year industrial-policy programme with quantified targets, intervention timelines, and assigned agency responsibilities.

Value-chain ascent trajectory:

• Near-term (2026–2027): Consolidate and deepen advanced assembly, test, and packaging (ATP),

the Philippines' current core competency (~13% of global ATP capacity across Texas Instruments Baguio, Analog Devices Cavite, STMicroelectronics Calamba, ON Semiconductor, NXP, Amkor Subic).

• Mid-term (2027–2029): Develop IC design capacity — fabless / design-house ecosystem in

Metro Manila and Cebu; leverage the Philippines' existing talent base in electrical engineering.

• Long-term (2030+): Establish front-end manufacturing infrastructure, including wafer fabrication.

National laboratories (fabrication / R&D / talent development) are the enabling asset layer.

Workforce development: 128,000 semiconductor professionals upskilled by 2030 through TESDA, CHED, DOST, and industry-led training programmes coordinated through SEIAC; DTI-BOI and the National Government Agencies (NGAs) are the coordinating bodies.

National laboratories: Up to three specialised national laboratories proposed: 1. Fabrication lab — enabling process development for advanced-packaging and wafer-level technologies 2. R&D lab — academic-industry collaboration hub for chip design and process innovation 3. Talent development lab — hands-on training environment bridging curriculum-to-fab gaps

Legislative roadmap: SEIAC Chair Executive Secretary Ralph Recto committed to monitoring implementation with "clear deadlines, assigned responsibilities, and legislative action" at the March 23 launch, explicitly flagging the risk of the plan becoming "paper with ambition."

Fiscal vehicle: Implementation relies on CREATE MORE Act (RA 12066) incentive architecture — up to 17-year Income Tax Holiday (ITH) + 5% Special Corporate Income Tax (SCIT) or Enhanced Deductions Regime (EDR) for registered semiconductor enterprises through BOI. Tatak Pinoy Act (RA 11981) provides the manufacturing-localization-preference layer for government procurement of semiconductor-embedded goods.

Downstream implications

• ATP incumbents (Texas Instruments, Analog Devices, STMicroelectronics, ON Semiconductor,

NXP, Amkor) face cleaner policy environment for capex expansion decisions; 128k workforce pipeline partially de-risks the talent bottleneck identified in multiple SEIPI surveys.

• IC design ecosystem: Roadmap's explicit IC-design pillar is the first formal commitment

by a Philippine government to incubate a fabless/design-house tier; competes directly with Vietnam (Decree 36/2024), Indonesia (semiconductor roadmap), and Malaysia (NSS 2024) for US/Korean/Taiwanese design-center relocations.

• Front-end fab trajectory: Wafer-fabrication language is aspirational at this stage (no

committed anchor tenant or site); the three national laboratories are the necessary precondition; realistically a 2030–2035 horizon even under aggressive implementation.

• ASEAN Chairmanship leverage: Philippines chairs ASEAN in 2026; the Roadmap is framed in

part as an ASEAN semiconductor ecosystem integration play, positioning PH as the coordinating node for the regional semiconductor agenda.

Open questions

• Will a dedicated PSEI Fund be created under a future appropriations act, or will all capex

flow through existing NRCP/PCHRD/DOST-Grants-in-Aid mechanisms?

• Which entity will operate the three national laboratories — state university consortia (UP,

DLSU, Mapua), public-private joint ventures, or a new DOST agency?

• Will the Philippines seek WTO notification of any direct subsidies under the PSEI Roadmap,

or rely solely on the CREATE MORE / Tatak Pinoy incentive architecture?

• Monitoring cadence: Recto committed to SEIAC quarterly reviews — first formal progress report

expected June–July 2026.