Malaysia National Semiconductor Strategy: RM25 bn 'Made by Malaysia' push up the chip value chain

Mechanism

The NSS layers fiscal incentives onto Malaysia's existing semiconductor base, which is heavily weighted toward back-end OSAT and test (Penang cluster: Inari Amertron, Unisem, Malaysian Pacific Industries, plus multinational anchors Intel, Infineon, AMD, Bosch, ams Osram, ASE, Lam Research). The strategy explicitly acknowledges Malaysia cannot compete with TSMC, Samsung or Intel at leading-edge silicon wafer fabrication and instead targets three structurally less-capital-intensive niches:

1. IC design -- using "design houses in residence" support and tax incentives modelled on Singapore's design ecosystem. 2. Advanced packaging -- 2.5D/3D, chiplets, fan-out wafer- level packaging. The RM1.59 bn Advanced Packaging Centre is the flagship physical asset; the bet is that as Moore's-Law scaling slows, packaging captures more of the value-add. 3. Manufacturing equipment / test -- leveraging Malaysia's existing OSAT depth to move into back-end automated test equipment and packaging tools.

The fiscal envelope is modest by G7 standards (RM25 bn ≈ USD 5.3 bn over a decade vs USD 52.7 bn under the US CHIPS Act and EUR 43 bn mobilisation under the EU Chips Act) but large relative to Malaysian GDP and explicitly comparable in form to the UK's GBP 1 bn niche-focused National Semiconductor Strategy (May 2023). The "Made by Malaysia" framing -- developing indigenous global champions rather than just hosting foreign fab capacity -- is the structural ambition that distinguishes NSS from earlier MIDA-led FDI-attraction efforts.

Downstream implications

• EWM (iShares MSCI Malaysia): Inari Amertron, Malaysian

Pacific Industries, Unisem, Vitrox, ViTrox, Pentamaster and Greatech are all direct beneficiaries. Together semiconductor-adjacent names are ~10-15% of EWM NAV; the NSS framework is a multi-year tailwind to capex and contract pull.

• Geopolitical positioning: Malaysia is a key beneficiary of

the US-China chip-equipment perimeter and "China+1" supply- chain reshuffling. Intel's USD 7 bn Penang advanced-packaging build (announced Dec 2021, expanding through 2024) and Infineon's EUR 5 bn Kulim 3 SiC fab are exemplars of the inbound flow that NSS is designed to deepen and capture domestically.

• Theme alignment: Slots into the **Western and allied

industrial-policy stack** as a Quad-adjacent semiconductor subsidy programme, similar in scale and form to the UK strategy and to Brazil's Brasil Semicon programme. Together with India's Semicon India PLI and Vietnam's Decree 182, the NSS reinforces the global pattern of mid-sized economies funding niche semiconductor capacity to slot into the post- China-restriction supply chain.

Open questions

• Execution risk: prior Malaysian industrial-policy

initiatives (e.g. National Automotive Policy 2014, MSC status framework) have under-delivered against announced ambitions. Track Phase 1 milestone delivery (2024-2027) and the named local champions emerging by Phase 2.

• US CHIPS Act guardrails interaction: Malaysian fabs and

packaging facilities funded with US CHIPS Section 4652 beneficiaries cannot expand China-bound capacity for 10 years -- shapes which multinationals anchor in Penang vs diversify to Vietnam.

• Talent pipeline: the 60,000-engineer target is large

relative to Malaysia's existing engineering workforce; watch for visa-policy adjustments to attract regional talent.