Singapore Research, Innovation and Enterprise 2030 Plan (RIE2030)

Mechanism

RIE2030 is the latest in Singapore's quinquennial Research, Innovation and Enterprise plans — a horizontal industrial-R&D umbrella under which all subsequent SG sectoral R&D, talent, and corporate-incentive instruments are budgeted and coordinated. The plan is a S$37 billion five-year allocation (2026-2030) issued by the National Research Foundation under the Prime Minister's Office, with co-ordination across A*STAR, EDB, Enterprise Singapore, MOE and the university and research-hospital system.

The structural novelty of RIE2030 versus RIE2025 (S$25bn) is the introduction of two RIE Flagships and two RIE Grand Challenges — large mission-led national programmes intended to drive measurable economic outcomes and concentrate R&D capital around strategically important sectors. The first named Flagship is in semiconductors, with the explicit stated goal of positioning Singapore as a strategic R&D and manufacturing node in the global semiconductor supply chain, including expanded corporate R&D footprints, deep-tech start-up formation, and capacity for globally-competitive Singapore-based firms in the supply chain.

Budget split (per NRF release / EDB summary):

• 24% foundational research
• 20% innovation and enterprise
• 17% infrastructure and new programmes ("white space")
• 10% talent development
• balance to thematic / strategic priorities (AI, data and compute;

ageing; sustainability)

Downstream implications

• RIE2030 is the budget umbrella under which Singapore's

semiconductor industrial-policy stack — EDB tax incentives, A*STAR / IME equipment R&D, GlobalFoundries and Micron expansion support — is funded and prioritised. It is the SG-side counterpart to Japan's Rapidus / JASM subsidy architecture and Malaysia's NIMP2030, positioning Singapore in the allied semiconductor supply-chain diversification stack.

• The Semiconductor Flagship designation signals concentration of R&D

capital and policy attention on chip-design, advanced packaging (heterogeneous integration), and specialty-process manufacturing capacity — areas where Singapore already has GlobalFoundries, UMC, TowerSemiconductor, and Micron NAND presence.

• 1%-of-GDP R&D allocation maintains parity with OECD high-R&D

benchmarks (Israel, South Korea) and signals that Singapore intends to defend its position as a high-value innovation hub rather than cede ground on R&D intensity to Korea / Taiwan / China.

• Pairs structurally with 2024-03-28-singapore-significant-investments-review-act

(SG inbound FDI screening): RIE2030 is the positive-incentive side of SG's strategic-industries architecture; SIRA is the defensive screening side.

Open questions

• Full project-level allocation between the two Flagships and two

Grand Challenges (only the Semiconductor Flagship is named in launch materials; the second Flagship and both Grand Challenges remain to be specified).

• Whether RIE2030 funding will be tagged to specific company-level

awards (TSMC / Micron / GlobalFoundries expansions) or routed entirely through A*STAR / IHL / corporate-lab consortia.

• Interaction with US export-control architecture: Singapore's

reliance on US chip-design IP and EDA tools means RIE2030's semiconductor flagship operates within the perimeter set by US BIS rules — worth watching for any explicit reference to diversification or self-reliance language in implementing documents.