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Last amendment: PIB press release confirming the Union Cabinet approval of Crystal Matrix Limited and Suchi Semicon Limited under ISM (PRID 2258116). on 2026-05-05.
The scheme operates through competitive application windows administered by ISM. Applicants submit project proposals to MeitY; ISM evaluates and recommends to the Union Cabinet for final approval. Fiscal support is disbursed over approximately five to six years against capital expenditure milestones, reducing cash-flow risk for capital-intensive fab projects.
The scheme covers five technology categories:
1. Silicon semiconductor fabs -- legacy nodes (>65nm), mature nodes (28-65nm), and advanced nodes (<28nm). Fiscal support 50% of project cost. 2. Display fabs -- AMOLED and LCD. Fiscal support 50%. 3. Compound semiconductor / silicon photonics / sensors / discrete devices. Fiscal support 50%. 4. ATMP/OSAT (assembly, testing, marking, and packaging). Fiscal support 50%. 5. Semiconductor design (Design Linked Incentive, DLI). Cash incentive up to 50% of eligible expenditure + product deployment incentive.
ISM operates under MeitY and functions as an independent nodal body coordinating land allocation (state governments), utility infrastructure, fiscal-support disbursement, and technology partnership approvals.
Investment Region, Gujarat. Investment: Rs 91,526 crore (~$11bn). Target capacity 50,000 wafer starts per month. PSMC (Powerchip Semiconductor Manufacturing Corp) provides process technology; Tata Electronics holds majority ownership. Ground- breaking ceremony March 2024.
Investment: Rs 27,120 crore (~$3.3bn). Targets automotive, mobile, and data- centre end-markets. Indigenous packaging technology.
technology partner.
assembly and test facility in Sanand, Gujarat. First India-assembled Micron chips shipped from 2024.
commitment to domestic semiconductor manufacturing in any emerging-market economy. The subsequently committed private investment (Rs 1.26 lakh crore from approved units) represents a 1.7x fiscal-support leverage ratio.
capacity before ISM. The Dholera fab, if built to spec, would make India the third major new fab geography added in the 2020s after the US (CHIPS Act) and Europe (EU Chips Act).
complementary risk profile to Taiwan: democratic governance, large English- speaking engineering workforce, no Taiwan-strait exposure. ISM makes India a credible ATMP alternative to Malaysia/Vietnam/China for US-allied chip companies.
("Self-Reliant India") industrial doctrine, which means it has durable cross- party political support and is not easily reversed on an electoral cycle.
Severity is capped at 4 rather than 5 because the initial application window (2022) saw early applicants withdraw (ISMC/Vedanta-Foxconn collapsed 2023), and no silicon fab had entered commercial production at the time of filing. Execution risk is material; the Tata/PSMC path is more credible but has not yet been de-risked.
ISM predates the US CHIPS Act (August 2022), the EU Chips Act (September 2023), and Korea's K-Chips Act (March 2023) by months to over a year. India moved first among the Quad governments on formal fab subsidy legislation. The programme was partly driven by COVID-era auto-sector semiconductor shortages that idled Indian carmakers (Maruti Suzuki, Tata Motors) in 2021, and partly by medium-term strategic concerns about China-Taiwan concentration risk in advanced-node capacity.
The ISM design-linked incentive (DLI sub-scheme) targets India's existing strength: India trains approximately 25% of global VLSI/chip-design graduates but captures a small share of global chip-design revenue. The DLI creates a fiscal bridge between design (where India has talent) and manufacturing (where it has the ISM-backed fabs).
and the broader Indian capex cycle. CG Power is in the SMIN mid-cap index.
PSMC (Taiwan, not exchange-listed) technology transfer to Tata. Tokyo Electron and Advantest are likely equipment suppliers to the Dholera fab.
OSAT (Inari, Unisem) and Thai OSAT (Hana Microelectronics). Negative margin pressure on incumbents over the 2027-2030 horizon.
and PSMC technology transfer timelines are the key variables to watch.
manufactured chips. Will it join the US-Japan-Netherlands equipment-export- control perimeter when it becomes a chip producer?
buildout; delays here are the most likely execution bottleneck.
commitment but also signals that the first-round build-out is behind schedule.